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The Program for 2008 will be loaded here in August, 2008 PRELIMINARY PROGRAM FOR 2007 (program subject to change) Sunday, October 28, 2007
Piedmont Registration 12:00 -5:00 pm Registration for FDIP and Meeting
Peachtree 1:15 – 5:55 pm FDIP Workshop
MONDAY, OCTOBER 29, 2007
Piedmont Registration7:00 - 8:00 am Registration
Georgia East Ballroom7:00 - 8:00 am Continental Breakfast
Atlanta Ballroom8:00 - 8:10 am Welcome/Introductory RemarksPaul Franzon, North Carolina State University
8:10-8:40 Session I – Plenary/Keynote SESSION CHAIR: KEYNOTE: Emerging Paradigms in IC and Systems Packaging Rao Tummala, Georgia Tech
8:40 – 10:00 am Session II – Power Distribution Measurement SESSION CHAIRS: Thomas Winkel, IBM Tawfik Rahal-Arabi, Intel
CPU Generated Binary and Ternary Loads for Power Delivery Assessment (Student Paper) William Lambert and Rajapandian Ayyanar................................Arizona State U Measurement of Supply Pin Current Distributions in Integrated Circuit Packages James Weaver and Mark Horowitz........................................... Stanford
A Method for Measuring Vref Noise Tolerance of DDR2-SDRAM on Test Board Simulating Actual Memory Module Yutaka Uematsu, Hideki Osaka, Yoji Nishio and Susumu Hatano............... Hitachi
Test Chip Electrical Measurements with Model Correlation Michael A. Lamson..................................................... Texas Instruments
Piedmont Registration10:00 – 10:15 am Refreshment Break
Atlanta Ballroom 10:15 – 11:00 am Session III – Fundamentals and Advances in High-Speed Measurements (Embedded Tutorial) Steve Corey, Tektronix
Atlanta Ballroom 11:00 am – 12:40 noon Session IV – High Speed Channels SESSION CHAIRS: Wendem Beyene, Rambus Bob Evans, Cisco
Swarm Intelligence for Electrical Design Space Exploration (Student Paper) Navraj Singh, Bhyrav Mutnury, Caleb Wesley, Nam Pham, Erdem Matoglu, Moises Cases and Daniel N de Araujo ............................................. IBM
6b9b Encoding Scheme for Improving Single-Ended Interface Bandwidth and Reducing Power Consumption without Pin Count Increase Brian Wang, Min Wang, Woong Hwan Ryu........................................... Intel
Modeling and Analysis Techniques of Jitter Enhancement across High-Speed Interconnect Systems Wendemagegnehu (Wendem) Beyene......................................... Rambus
Prediction of System Performance Based on Component Jitter and Noise Budgets Dan Oh, Frank Lambrecht, JiHong Ren, Sam Chang, Ben Chia, Chris Madden and Chuck Yuan................................................................................. Rambus Electrical Analysis of Multi-board PCB Systems with Differential Signaling Considering Non-ideal Common Ground Connection Mosin Mondal, Bhyrav Mutnury, Pravin Patel, Samuel Connor, Bruce Archambeault and Moises Cases............................................................................ IBM
Georgia East Ballroom12:40 – 1:40 pm Lunch (for Meeting attendees)
Atlanta Ballroom 1:40 – 3:20 pm Session V – Linear Macromodeling SESSION CHAIRS: Moises Cases, IBM Ram Achar, Carleton University
A Refinement Procedure for S-Parameter DC Extrapolation based on Sampling Theorem and Causality Hao Shi............................................................................... Rambus
Fast Macromodeling Technique of Sampled Time/Frequency Data using z-domain Vector-Fitting Method Yidnek S. Mekonnen and José E. Schutt-Aine..................................................................................... U of Illinois
Parametric Macromodeling of Multiport Networks from Tabulated Data P. Triverio...................................................... Politecnico di Torino M. S. Nakhla.............................................................. Carleton U S. Grivet-Talocia............................................... Politecnico di Torino
Weighting Strategies for Passivity Enforcement Schemes A. Ubolli and S. Grivet-Talocia............................. Politecnico di Torino
SPICE-Compatible Representations of S-Parameter Matrices of Passive Networks with Transport Delay (Student Paper) Se-Jung Moon and A.C. Cangellaris...................................... U of Illinois
Piedmont Registration 3:20 -3:35 pm Refreshment Break
Atlanta Ballroom 3:35 – 4:35 pm Session VI – EM Modeling SESSION CHAIRS: Kladhar Radhakrishnan, Intel Jian-Ming Jin, University of Illinois
Extended Segmentation Procedure for Electromagnetic Modeling of the Power Distribution Network (Student Paper) Varvara Kollia and Andreas C. Cangellaris........................U of Illinois
Efficient Full-Wave Analysis of Multilayer Interconnection Structures Using a Novel Domain Decomposition–Model Order Reduction Method (Student Paper) Shih-Hao Lee and Jian-Ming Jin........................................U of Illinois
Stochastic High Order Basis Functions for Volume Integral Equation with Surface Roughness (Student Paper) Tarek Moselhy and Luca Daniel...................................................... MIT
Georgia East Ballroom 4:35 – 6:30 pm Session VII - Open Forum (Posters) Designers Forum
SW-HW-EM Modeling Flow for Multi-Port EMI Optimization of Component Placement in Mobile Devices Timo Tarvainen, Tuukka Ruokamo and Lauri Hynynen.......................... Esju Oy Ilkka Kelander and Pia Kotiranta............................................ Nokia Research
Maintaining System Signal and Power Integrity Characteristics as Part of a Module Cost-Reduction Exercise P.E. Dahlen, T. Timpane, D.J. Becker, T.W. Liang, W.D. Martin, P. Rudrud and G.K. Bartley............................. IBM
Design, Analysis, and Optimization of DDR2 Memory Power Delivery Network Junho Lee, Hyunseok Kim, Kimyung Kyung, Minyoung You, Hyungdong Lee, Kunwoo Park and Byongtae Chung...................... Hynix Semiconductor
A Hybrid Electromagnetic Bandgap (EBG) Power Plane with Discrete Inductors for Broadband Noise Suppression William E.McKinzie....................................................... WEMTEC
Plate Orientation Effect on the Inductance of Multi-Layer Ceramic Capacitors (Student Paper) Hocheol Kwak and Haixin Ke............................................ Clemson U Byoung Hwa Lee..................................... Samsung Electro-Mechanics Todd Hubing................................................................. Clemson U
Distributed On-chip Power Supply Noise Characterization of the Cell Broadband Engine Yaping Zhou, Paul M. Harvey, Brian Flachs, John Liberty, Gilles Gervais, Rohan Mandrekar, Howard H. Chen and Tetsuji Tamura.......................... IBM
Wafer Level Fabrication and Packaging of Miniature Combline Filters Sarabjit Mehta and Peter Petre................................................. HRL Labs
Parasitic-Aware RF Design via Parameterization of Embedded Passives on Multilayer Organic Substrates Sung-Hwan Min, Chung-Seok Seo, Semyon Lapushin, Larry Carastro, Sidharth Dalmia and George White................................ Jacket Micro Devices Madhavan Swaminathan............................... Georgia Institute of Technology
Coupled Analysis of Quasi-static and Full-Wave Solution towards IC, Package and Board Co-design Jifeng Mao, Greg Fitzgerald and An-Yu Kuo........................................ Optimal Sidina Wane............................................................... NXP Semiconductors
Automatic Layout Generation of RF Embedded Passive Designs Mohit Pathak, Satya Vadlamudi, Josh Beaver and Sung Kyu Lim...... Georgia Tech
Fast Algorithm for Determining Eye-Diagram Characteristics of Lossy Transmission Lines Jeng-Hau Lin, Wei-Da Guo, Guang-Hwa Shiue, Chien-Min Lin, Tian-Wei Huang and Ruey-Beei Wu....................................................... National Taiwan U
SI-PD Co-simulation and Co-design Methodology for High Speed Channel Myoung Joon Choi, Vishran S. Pandit and Woong Hwan Ryu..............Intel
Fast ISI Characterization of Passive Channels Using Extreme Value Distribution Yu (Sam) Chang and Dan Oh...................................................Rambus
Long Range Connector via Coupling Effects for High Speed Signals Thomas-Michael Winkel and Roland Frech.......................................... IBM Thomas Gneiting...................................................................... AdMOS
Jitter Amplification Considerations for PCB Clock Channel Design Chris Madden, Sam Chang, Dan Oh and Chuck Yuan......................... Rambus
System Margin Improvement with Multiphase Equalization for High-Speed Links Jihong Ren and Dan Oh.............................................................. Rambus
Reflectionless Design for Differential-Via Transitions Using Neural Network-Based Approach Yung-Shou Jeng, Wei-Da Guo and Guang-Hwa Shiue............ National Taiwan U Chien-Min Lin..................................... Taiwan Semiconductor Manufacturing Ruey-Beei Wu............................................................... National Taiwan U
On-Package Continuous-Time Linear Equalizer using Embedded Passive Components Jaemin Shin and Kemal Aygün.................................................... Intel
Crosstalk Measurement, Extraction and Validation in 10Gbps Serial Systems P. Patel, R. Ahmed, B. Herrman, M.Cases and P.Seidel............................ IBM G. Oganessyan and R. Fox.............................................................. Molex
Predicting and Optimizing Jitter and EyeOpening Based on Bitonic Step Response Haikun Zhu, Chung-Kuan Cheng, Alina Deutsch and George Katopis............ IBM
Predictions of the Worst-Case Crosstalk Including ISI Effect and the Worst-Case Eye Opening Including Crosstalk Effect for Electronic Packaging System Design Zhaoqing Chen.............................................................................. IBM
Package Performance Improvement with Counter-Discontinuity and its Effective Bandwidth Nanju Na and Mark Bailey............................................................... IBM Asad Kalantarian.......................................................................... MIT
Design Margin Methodology for DDR Interface Soujanna Sarkar, Amit Brahme, Subash Chandar G............ Texas Instruments
System Design for 3D Multi-FPGA Packaging Thorlindur Thorolfsson and Paul D. Franzon ................. North Carolina State U
Physically-Consistent Broadband Material Model Generation for Microstrip Transmission Lines Zhen Zhou and Kathleen L. Melde............................................ U of Arizona
Computation of Intra-pair Skew for Imbalance Differential Line using Modified Mixed-mode S-parameter Seungyong Baek, Eric Lee and Baegin Sung............................... Silicon Image
Application of Integral Analysis Technique to Determine Signal- and Power Integrity of Advanced Packages Nebojša Nenadović....................................................... NXP Semiconductor Ekkehard Miersch ............................................................. EFM Consulting Martin Versleijen and Sidina Wane.................................. NXP Semiconductor
TUESDAY, OCTOBER 30, 2007
Piedmont Registration 7:00 - 8:00 am Continental Breakfast Atlanta Ballroom8:00 – 8:45am Session VIII – 3D Interconnect and Packaging (Embedded Tutorial) K. C. Saraswat, Stanford U SESSION CHAIR: Ram Achar
Atlanta Ballroom 8:45-10:25 am Session IX – Power Distribution SESSION CHAIRS: Christopher Pan, IntelBrian Young, Texas Instruments
Investigating the Impact of Supply Noise on the Jitter in Gigabit I/O Interfaces Ralf Schmitt, Hai Lan, Chris Madden and Chuck Yuan............................ Rambus
A Novel EBG Power Plane with Stopband Enhancement using Artificial Substrate (Student Paper) Ting-Kuang Wang, Tzu-Wei Han and Tzong-Lin Wu................ National Taiwan U
Performance Impact of Simultaneous Switching Output Noise on Graphic Memory Systems Joong-Ho Kim, Woopoung Kim, Dan Oh, Ralf Schmitt, June Feng, Chuck Yuan, Lei Luo and John Wilson................................................................ Rambus
Selection Criteria and Tradeoffs for 0402 and 0204 Ceramic Chip Capacitors for On-Package Decoupling Applications Brian Young............................................................ Texas Instruments
Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication (Student Paper) Gang Huang, Muhannad Bakir and Azad Naeemi..... Georgia Institute of Technology Howard Chen........................................................................ IBM James D. Meindl............................................. Georgia Institute of Technology
Piedmont10:25 - 10:40 am Refreshment Break
Atlanta Ballroom 10:40 – 12:20 Session X – Advanced Transmission Lines SESSION CHAIRS: Ramesh Abhari, McGill University Kathleen Melde, University of Arizona
Characterization of Metamaterial Interconnects (Student Paper) Asanee Suntives, Arash Khajooeizadeh and Ramesh Abhari.................. McGill U
Dual-Mode High-Speed Data Transmission Using Substrate Integrated Waveguide Interconnects (Student paper) Asanee Suntives and Ramesh Abhari............................................... McGill U
High-frequency Characterization and Simulation of Conductor Loss in Printable Electronics Technology Vesa Pynttäri, Riku Mäkinen, Juha Lilja, Ville Pekkanen, Matti Mäntysalo, Pauliina Mansikkamäki and Markku Kivikoski................................................................ Tampere U
Modeling of the Resistive and Inductive Behaviour of Layered and Coated Conductors (Student Paper) Thomas Demeester and Daniel De Zutter...................................... Ghent U
Vertical Differential Pair Routing in High Performance Ceramic Multi-chip Module Packages Franklin Baez, Peter Van Dyke and Christopher Spring......................... IBM
Georgia East Ballroom12:20 am - 1:45 pm Lunch (for Meeting attendees)
Piedmont 12:20 - 1:45 Technical Program Committee Meeting (Committee Members only) Atlanta Ballroom1:45 – 2:30 pm Session XI – Fundamentals of Parallel Computing for Scalable Solutions Vikram Jandyala, Washington State U (Embedded Tutorial)
Piedmont Registration2:30 -3:00 pm Refreshment BreakAtlanta Ballroom Session XII– Parallel Algorithms3:00 – 4:40 pm SESSION CHAIRS: Albert Tuehli, IBM Michel Nakhla, Carleton University
LIM-Based Algorithms for the Transient Simulation of Large Networks José Schutt-Ainé............................................................ U of Illinois
Parallel Simulation of High-Speed Interconnects using Delay Extraction and Transverse Partitioning (Student Paper) Natalie Nakhla, Michel Nakhla and Ram Achar......................... Carleton U Albert Ruehli.............................................................................. IBM
Parallel Waveform Relaxation and Matrix Solution for Large PEEC Model Problems Giulio Antonini.................................................................. U of L'Aquila Jonas Ekman.......................................................................... Lulea U Albert E. Ruehli............................................................................ IBM
Efficient Signal and Power Integrity Analysis Using Parallel Techniques Tao Su, Xiaofeng Wang, Zhengang Bai and Venkata Vennam............. Sigrity
Parallel Algorithms for Fast Integral Equation Based Solvers Xiren Wang and Vikram Jandhyala..................................... U of Washington
Atlanta Ballroom 4:40 – 6:40 pm Session XIII- Open Forum (Posters)
A New Macromodeling Approach for Digital Output Drivers and Application in Simultaneous Switching Noise Analysis Benjamin R. Buhrow, Erik S. Daniel and Barry K. Gilbert.................. Mayo Clinic
Chip Power Model - A New Methodology for System Power Integrity Analysis and Design Emre Kulali, Evgeny Wasserman and Ji Zheng............. Apache Design Solutions
An Efficient Method for Power integrity and EMI Analysis of Irregular-Shaped Power/Ground Planes in Packages En-Xiao Liu, Xingchang Wei, Zaw Zaw Oo and Er-Ping Li........... ....................................................Institute of High Performance Computing
Determination of the broadband transmission line parameters of lossy lines using the Dirichlet to Neumann operator Thomas Demeester and Daniel De Zutter...................................... Ghent U
Analysis of Power Distribution Networks using Multiconductor Transmission Line Theory (Student Paper) K. Payandehjoo, D. Kostka and R. Abhar....................................... McGill U
Modeling of Advanced Multilayered Packages with Multiple Vias and Finite Ground Planes En-Xiao Liu, Xingchang Wei, Zaw Zaw Oo and Er-Ping Li........... .......................................................Institute of High Performance Computing Le-Wei Li................................................................. National U of Singapore
A Domain Decomposition Method for the Finite Element Simulation of Circuit Board Interconnects Kaiyu Mao................................................................ U of Illinois Jilin Tan............................................................ Cadence Design Jian-Ming Jin............................................................. U of Illinois
Multi-Rate FDTD Method for Fast Electromagnetic Simulation Yuya Nakazono and Hideki Asai...................................... Shizuoka U
A Recovery Algorithm of Linear Complexity in the Time-Domain Layered Finite Element Reduction Recovery (LAFE-RR) Method for Large Scale Electromagnetic Analysis of High-Speed ICs (Student Paper) Houle Gan and Dan Jiao...................................................... Purdue U
Choosing the Right Number of Basis Functions in Multiscale Transient Simulation Using Laguerre Polynomials (Student Paper) K. Srinivasan, P. Yadav, E. Engin and M. Swaminathan............................... .......................................................... Georgia Institute of Technology
An Efficient 3D-to-2D Reduction Technique for Frequency-Domain Layered Finite Element Analysis of Large-Scale High-Frequency Integrated Circuits Feng Sheng, Sourav Chakravarty and Dan Jiao........................ Purdue
TwinAx Differential Cable Helical Shield Wrap Modeling D.N. de Araujo and M. Commens............................................. Ansoft B. Mutnury and J. Diepenbrock............................................................................. IBM
Effcient, Automatic Model Order Determination and Model Generation for Tabulated S-parameters Mengmeng Ding and David Smart....................................... Analog Devices
A Rapid Link Analysis Technique Using Four-Port Scattering Parameters Bart McCoy............................................................................ Mayo Clinic Jonathan Coker................................................................. U of Minnesota Robert Techentin, Barry Gilbert and Erik Daniel.............................. Mayo Clinic
In-Situ Characterization of High-Speed I/O Chip-Package Systems (Student Paper) Jongshick Ahn, Sudeep Puligundla, Rizwan Bashirullah, Robert M. Fox and William R. Eisenstadt .................................................. U of Florida
Broadband On-Wafer Calibrations Comparison for Accuracy and Repeatability on Co-Planar Waveguide Structures (Student Paper) Qian Li and Kathleen L. Melde........................................... U of Arizona
Study of High Speed Current Excitation Reverse Engineering Methodology Using Measured Voltage and PDN Impedance Profile from a Running Microprocessor Huang Jimmy Huat Since, Bin Yusof Ahmad Jalaluddin and Ong Alvin Yih Yeong............................................................ Intel
WEDNESDAY, OCTOBER 31, 2007
Piedmont Registration7:00 - 8:00 am Continental Breakfast
Atlanta Ballroom8:00 – 9:20 am Session XIV – Parallel Algorithims II SESSION CHAIRS: Michel Nakhla, Carleton University
Albert Ruehli, IBM A Parallel Hierarchical Solver for the Integral Equation Analysis of Low Frequency Devices F. P. Andriulli and H. Bagci............................................. U of Michigan F. Vipiana and G. Vecchi,...................................... Politecnico di Torino E. Michielssen.............................................................. U of Michigan
Fast EMC Analysis of High-Speed Interconnects Via Waveform Relaxation and Transverse Partitioning (Student Paper) Arvind Sridhar, Natalie Nakhla, Ram Achar and Michel Nakhla...... Carleton U
Parallel Discrete Complex Image Method for Barnes-Hut Accelerated Capacitance Extraction in Multilayered Substrates (Student Paper) Khalid Butt and Ian Jeffrey............................................. U of Manitoba Feng Ling.......................................................................... Physware Vladimir Okhmatovski..................................................... U of Manitoba
Parallelization of the Reduced-Coupling Technique for a Method-of-Moments-Based Field Solver Used for Product-Level Wide Data-Bus Analysis A. J. Hesford1, J. D. Morsey, W. C. Chew, A. Deutsch and H. H. Smith....IBM
Atlanta Ballroom 9:20 – 10:20 am Session XV – Non-Linear Macromodeling SESSION CHAIRS: Zhaoqing Chen, IBM Stefano Grivet-Talocia, Politecnico d Torino
Efficient Parameterized Nonlinear Simulation of VLSI Circuits using Domain Decomposition Techniques (Student Paper) A. Jerome, P. Gunupudi and M. Nakhla................................... Carleton U
Macromodels of IC Buffers Allowing for Large Power Supply Fluctuations I. S. Stievano, C. Siviero, I. A. Maio and F. G. Canavero.... Politecnico di Torino
System level Validation of Improved IO Buffer Behavioral Modeling Methodology Based on IBIS Ambrish Varma, Michael Steer and Paul Franzon........ North Carolina State U
Piedmont Registration 10:20 – 10:40 am Refreshment Break
Atlanta Ballroom 10:40 – 11:20 pm Session XVI – EM Modeling II SESSION CHAIRS: Kaladhar Radhakrishnan, Intel Jian-Ming Jin, University of Illinois
Electromagnetic Simulation for Inhomogeneous Interconnect and Packaging Structures Lijun Jiang, Barry J Rubin, Yuan Liu, Jason D Morsey, and Alina Deustch......IBM
Cylindrical Conduction Mode Basis Functions for Modeling of Inductive Couplings in System-in-Package (SiP) (Student Paper) Ki Jin Han, Ege Engin and Madhavan Swaminathan.................................. ..........................................................Georgia Institute of Technology
Georgia East Ballroom 11:20 – 1:00 pm Lunch (for Meeting attendees) Awards Closing Remarks
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