PROGRAM FOR EPEP 2006
(Scottsdale, Arizona)
Sunday, October 22, 2006
Wassaja Foyer
7:00 -5:00 pm Registration for Short Courses and Meeting
8:00 am – 12:00 noon SHORT COURSE 1 – Electromagnetic Bandgap
Wassaja 6 Structures (EBG) for Power Delivery and Noise
Suppression in Mixed Signal Systems
Madhavan Swaminathan and Ege Engin (Georgia Institute
of Technology)
Ramesh Abhari (McGill University)
Wassaja 7 SHORT COURSE 2 – Understanding On-Chip
Transmission-Lines and Methodologies Used for
Developing Design Wiring Rules
Alina Deutsch and Howard Smith (IBM)
Wassaja 8 SHORT COURSE 3 – SI Modeling Alternatives and
Novel Applications of IBIS/IEEE AMS
Gary L. Pratt (Mentor Graphics)
Wassaja 3
1:15 – 5:55 pm FDIP Workshop
Wassja 2
6:45 – 8:00 Dinner for TPC, Short Course Instructors, TC-12 Members
Conference F
7:00 – 8:30 TC-12 Meeting
7:00 - 8:00 am Registration
7:00 - 8:00 am Continental Breakfast
8:10-8:40 Session I – Plenary/Keynote
SESSION CHAIR:
Paul Franzon, North Carolina State University
KEYNOTE:
Cheap Measurement Tricks:
Simple Ways to Check Power and
Signal Integrity
Issues
Mark Horowitz, Stanford University and Rambus
8:40 – 10:00 am Session II – Systems
SESSION CHAIRS:
Chris Pan, Intel
Chuck Yuan, Rambus
Designing for Low Power
Tawfik Rahal-Arabi, Ali Muhtaroglu and Greg Taylor............................... Intel Corporation
Signal Integrity Impact of Ultra Low Power IO Initiatives
Ripan Das, Steven Yun Ji, Steve Peterson, Jian-Liang Chen and
Christopher Pan....................................................................................... Intel Corporation
Fine Pitch Inductively Coupled Connectors for Multi-Gbps Pulse Signaling
(Student Paper)
Karthik Chandrasekar, John Wilson, Evan Erickson, Zhiping Feng, Jian Xu,
Stephen Mick and Paul Franzon.......................................... North Carolina State University
Increasing Channel Margin of Distorted Serial Systems
P. Patel, M. Cases and D. de Araujo....................................................... IBM Corporation
D.Brunker and G. Oganessyan.................................................................................. Molex
T. Hemken................................................................................................................. Xilinx
10:00 – 10:20 am Refreshment Break
Wassaja 1-2
10:20 am – 12:00 noon Session III – Measurements
SESSION CHAIRS:
Thomas-Michael Winkel, IBM
U. Arz
Jitter Amplification Characterization of Passive Clock Channels at 6.4 and
9.6 Gb/s
Santanu Chaudhuri, Warren Anderson, John Bryan, James McCall and
Sanjay Dabral............................................................................................................... Intel
On-die Decoupling Capacitor Measurement Using Vector Network Analyzer
Fei Guo and Mark Frankovich................................................................. ATI Technologies
Dielectric Constant and Loss Tangent Characterization of Thin
High-K Dielectrics Using Corner-to-Corner Plane Probing
A. Ege Engin, Abdemanaf Tambawala, Madhavan Swaminathan and
Swapan Bhattacharya.......................................................... Georgia Institute of Technology
Pranabes Pramanik and Kazuhiro Yamazaki................................. Oak-Mitsui Technologies
A Method to Measure Impedance of Chip/Package/Board Power Supply
System Using Pseudoimpulse Current
Yaping Zhou, Sang H. Dhong, Brian Flachs, Paul M. Harvey and
Brad W. Michael..................................................................................... IBM Corporation
Measurement of Via Currents in Printed Circuit Board Using Inductive Loops
James A. Weaver and Mark A. Horowitz.............................................. Stanford University
12:00 – 1:30 pm Lunch (for Meeting attendees)
Wassaja 1-2
1:30 – 3:10 pm Session IV – Power Distribution
SESSION CHAIRS:
Dave Quint, Hewlett-Packard
Chee-Yee Chung, Intel
A New Approach to the Design of Power Distribution Networks
Containing Electromagnetic Bandgap Structures (Student Paper)
Amirali Tavallaee, Mark Iacobacci, and Ramesh Abhari.......................... McGill University
Switching Noise Suppression in Mixed Signal System Applications
Using Electromagnetic Band Gap (EBG) Synthesizer (Student Paper)
Tae Hong Kim, Ege Engin and Madhavan Swaminathan....................................................
......................................................................................... Georgia Institute of Technology
A Low Frequency Hybrid EBG Structure for Power Plane Noise Suppression
Will McKinzie............................................................................................ WEMTEC, Inc
Analysis of Embedded Package Capacitors for High Performance Components
(Student Paper)
Prathap Muthana............................................................... Georgia Institute of Technology
Erdem Matoglu, Nam Pham, Daniel N de Araujo, Bhyrav Mutnury and
Moises Cases........................................................................................ IBM Corporation
Madhavan Swaminathan.................................................... Georgia Institute of Technology
Efficient Modeling of Package Power Delivery Networks with
Fringing Fields and Gap Coupling in Mixed Signal Systems (Student Paper)
Krishna Bharath, Ege Engin and Madhavan Swaminathan..................................................
......................................................................................... Georgia Institute of Technology
Kazuhide Uriu and Toru Yamada..................................... Matsushita Electric Industrial Co
Wassaja Foyer
3:10 -3:30 pm Refreshment Break
Wassaja 1-2
3:30 – 4:30 pm Session V – I/O Macromodeling
SESSION CHAIRS:
B. Young
S. Grivet-Talocia, Politecnico di Torino
Guaranteed Locally-Stable Macromodels of Digital Devices via Echo State
Networks
I. S. Stievano, C. Siviero, I. A. Maio and F. G. Canavero................... Politecnico di Torino
Developing Improved IO Buffer Behavioral Modeling Methodology Based on IBIS
Ambrish Varma, Michael Steer and Paul Franzon............... North Carolina State University
Genetic Algorithms with Scalable I/O Macromodels to Find the Worst Case
Corner in High-Speed Server Electrical Analysis
Bhyrav Mutnury, Moises Cases, Nam Pham, Daniel N. de Araujo and
Erdem Matoglu...................................................................................... IBM Corporation
Wassaja 4-5
4:30 – 6:30 pm Session VI - Open Forum (Posters)
Modeling and Simulation
SESSION CHAIR:
Nam Pham, IBM
Antonio Maffucci, Università di Cassino
S-parameters Based Transmission Line Modeling with Accurate
Low-Frequency Response
WooPoung Kim, Joong-Ho Kim, Dan Oh and Chuck Yuan.............................. Rambus Inc
An Efficient and Flexible Modeling for Power/Ground Planes (Student Paper)
Kai-Bin Wu, Guang-Hwa Shiue and Wei-Da Guo.................... National Taiwan University
Chien-Min Lin.......................................... Taiwan Semiconductor Manufacturing Co., Ltd.
Ruey-Beei Wu......................................................................... National Taiwan University
Power Supply Noise Simulation Considering Dynamic Effect of On-Chip Current
Yaping Zhou and Sang H. Dhong........................................................... IBM Corporation
Yoichi Nishino....................................................... Sony Computer Entertainment America
Paul M Harvey, Rohan Mandrekar, Gilles Gervais and Nikki Criscolo..............................
........................................................................................................... IBM Corporation
Evaluation of Crosstalk in High-Frequency Interconnects with an Enhanced
Transmission Line Model
A.G. Chiariello.................................................................. Università Federico II di Napoli
A. Maffucci....................................................................................... Università di Cassino
G. Miano........................................................................... Università Federico II di Napoli
F. Villone and W. Zamboni................................................................ Università di Cassino
Application of an Efficient Full-Wave Simulator UA-FWLIS on Complicated
Stripline Structures
Xing Wang and Yi Cao....................................................................... University of Arizona
Zhaohui Zhu........................................................................................... Intel Corpporation
Steven L. Dvorak............................................................................... University of Arizona
A Preconditioned Hierarchical Algorithm for Impedance Extraction of
Interconnects in Packages (Student Paper)
Yang Yi, Peng Li, Vivek Sarin and Weiping Shi............................... Texas A&M University
Automated Timing and Electrical Analysis of a DDR2 Memory Interface
Gary L. Pratt......................................................................... Mentor Graphics Corporation
Barnes-Hut Accelerated Capacitance Extraction Via Locally Corrected
Nyström Discretization (Student Paper)
Mohammed Al-Qedra and Payam Saleh.......................................... University of Manitoba
Feng Ling.................................................................................... Cadence Design Systems
Vladimir Okhmatovski..................................................................... University of Manitoba
Broadband Rational Modeling via Adaptive Frequency Sampling for
Full-Wave Simulation
Ben Song, Feng Ling, Warren Harris and Aykut Dengi.................. Cadence Design Systems
Crosstalk Superposition of Multiple Aggressors in Electronic Package System
Pre-PD Signal Integrity Simulations
Zhaoqing Chen........................................................................................ IBM Corporation
CPU Power Delivery Impedance Profile Resonances Impact on Core FMAX
Alex Waizman, Omer Vikinski, and Gregory Sizikov................................. Intel Corporation
CPU Core Impedance Profile Correlation between Simulations and Measurements
Alex Waizman and Omer Vikinski....................................................................... Intel Israel
Causal Transient Simulation of Systems Characterized by Frequency-Domain
Data in a Modified Nodal Analysis Framework (Student Paper)
S. N. Lalgudi, K. Srinivasan, G. Casinovi, R. Mandrekar, E. Engin and
M. Swaminathan................................................................ Georgia Institute of Technology
On the Effect of Mobile Device Shape Characteristics to Interconnection Noise
Coupling to an RF Chip Antenna
Lauri Hynynen and Timo Tarvainen........................................................................ Esju Oy
Markku Rouvala and Antti Renko.................................................. Nokia Research Center
Broad-Band Characterization of Conductors with Arbitrary Topology
Using a Surface Integral Formulation
A.G. Chiariello.................................................................. Università Federico II di Napoli
A. Maffucci....................................................................................... Università di Cassino
G. Miano........................................................................... Università Federico II di Napoli
F. Villone and W. Zamboni................................................................ Università di Cassino
TUESDAY, OCTOBER 24, 2006
Wassaja Foyer
7:00 - 8:00 am Continental Breakfast
8:00 – 8:30 am Session VII – John Prince Memorial
SESSION CHAIRS:
Andreas Cangellaris, Univ. of Illinois Urbana Champaign
Steven Dvorak, University of Arizona
Wassaja 1-2
8:30-10:10 Session VIII – On-Chip Interconnect
SESSION CHAIRS:
Dale Becker, IBM
Greg Taylor, Intel
Multi-Rate Latency Insertion Method for the Fast Transient Simulation of
Large Networks with Nonlinear Termination (Student Paper)
Noritake Tsuboi and Hideki Asai.......................................................... Shizuoka University
Design of Compact Meander Delay Lines on Si Substrate (Student Paper)
Arash Khajooeizadeh and Ramesh Abhari................................................ McGill University
Transient Signal Distortion in Silicon-Based Interconnects over Thin-Film Metal Ground Layers (Student Paper)
L. Zhang and J. M. Song................................................................... Iowa State University
Analytical Estimation of Interconnect Loss Due to Dummy Fills
Akira Tsuchiya and Hidetoshi Onodera.................................................... Kyoto University
Simulation, Measurement and Modeling of Orthogonal On-Chip Interconnects
Yves Quéré, Thierry Le Gouguec, Pierre-Marie Martin, Denis Le Berre and
Fabrice Huret...................................................................................... LEST-UMR CNRS
10:10 - 10:30 am Refreshment Break
Wassaja 1-2
10:30 – 12:10 Session IX – High Speed Channels
SESSION CHAIRS:
Daniel de Araujo, IBM
Robert Evans, Cisco Systems
Controlled Inter-Symbol Interference Design Techniques of Conventional
Interconnect Systems for Data Rates Beyond 20 Gbps
Wendemagegnehu T. Beyene.................................................................................. Rambus
Multiple Edge Responses for Fast and Accurate System Simulations
Dan Oh.................................................................................................................. Rambus
Maximum Tolerable Power Supply Noise for Data-Clock Synchronization
Isaac Kantorovich and Chris Houghton.................................................... Intel Corporation
Accurate System Voltage and Timing Margin Simulation in CDR Based High
Speed Designs
Frank Lambrecht, Qi Lin, Sam Chang, Dan Oh, Chuck Yuan and
Vladimir Stojanovic............................................................................................... Rambus
Distortion Minimization for Packaging Level Interconnects
Haikun Zhu and Rui Shi.................................................. University of California San Diego
Hongyu Chen................................................................................................ Synopsys Inc
Chung-Kuan Cheng........................................................ University of California San Diego
12:10 am - 1:40 pm Lunch (for Meeting attendees)
Boardroom
12:10 - 1:40 Technical Program Committee Meeting
(Committee Members only)
1:40 – 3:00 pm Session X – Linear Macromodeling
SESSION CHAIRS:
Albert Ruehli, IBM
Hartmut Grabinski, University of Hannover
Causality-Constrained Interpolation of Tabulated Frequency Responses (Student Paper)
P. Triverio and S. Grivet-Talocia....................................................... Politecnico di Torino
A Passive Algorithm for Modeling Frequency-Dependent Parameters of Coupled Interconnects (Student Paper)
D. Paul, M. S. Nakhla and R. Achar...................................................... Carleton University
A. Weisshaar................................................................................. Oregon State University
A General Approach for Time-Domain Sensitivity Analysis of High-Speed Interconnects
Natalie Nakhla, Michel Nakhla and Ram Achar..................................... Carleton University
Model Order Reduction with Load Constraints (Student Paper)
Min Ma and Roni Khazaka...................................................................... McGill University
3:00 – 3:20 pm Refreshment Break
Wassaja 1-2
3:20 – 4:40 pm Session XI – Linear Macromodeling II
SESSION CHAIRS:
R. Achar, Carleton University
Andreas Cangellaris, Univ.of Illinois Urbana Champaign
Delay-Based Macromodels for Long Interconnects via Time-Frequency Decompositions
S. Grivet-Talocia................................................................................ Politecnico di Torino
An Efficient Closed Form Macromodeling Algorithm using Method of
Characteristics for Lossy Multiconductor Transmission Lines
Vrajesh Pothiwala and Anestis Dounavis.............................. University of Western Ontario
Waveform Relaxation Technique for Longitudinal Partitioning of Transmission Lines
Martin Gander.................................................................................... University of Geneva
Mohammad Al-Khaleel............................................................................ McGill University
Albert E. Ruehli........................................................................................................... IBM
Recursive Multi-Parameter Closed-Form Expressions for High-Speed Transmission Line Networks
N. Rodrigues, A. Jerome and P. Gunupudi............................................ Carleton University
Wassaja 4-5
4:40 – 6:40 pm Session XII - Open Forum (Posters)
Systems
SESSION CHAIR:
Pravin Patel, IBM
Design and Performance Analysis of Dual Die Pentium® 4 Package
Ananda Sarangi and Mahadevan Suryakumar............................................ Intel Corporation
Networks-in-Package; Design, Analysis and Implementation (Student Paper)
Gawon Kim ...................................... Korea Advanced Institute of Science and Technology
Kangmin Lee....................................................................................... Samsung Electronics
Jinhan Kim, Kicheol Bae and Choonheung Lee........................... Amkor Technology Korea
Hoi-Jun Yoo and Joungho Kim.......... Korea Advanced Institute of Science and Technology
BlueGene/L Hardware as a Springboard to Future Products
Phil R. Germann, Ryan J Schlichting, Trevor Timpane and
Todd Takken.............................................................................................................. IBM
Interconnects Analyses in Quasi-Monolithic Integration Technology (QMIT)
M. Joodaki.................................................................................................... Qimonda AG
A. Kricke, H. Hillmer and G. Kompa................................................... University of Kassel
Improving the Radiated Immunity of the Strip-Lines Using a Novel Hybrid EBG Structure
Hung-Chun Kuo and Sin-Ting Chen................................... National Sun Yat-sen University
Tzong-Lin Wu........................................................................... National Taiwan University
Packaging Considerations for a Compact Reconfigurable RF Tuner with a
Broadband Tuning Range (Student Paper)
Zhen Zhou and Kathleen L. Melde..................................................... University of Arizona
Eye-Pattern Improvement for Design of High-Speed Differential Links
Using Passive Equalization (Student Paper)
Ki Jin Han.......................................................................... Georgia Institute of Technology
Hayato Takeuchi.................................................................................... Sony Corporation
Ege Engin and Madhavan Swaminathan.............................. Georgia Institute of Technology
Design of Wideband Impedance Matching for Through-Hole Via Transition Using Ellipse-Shaped Anti-Pad
Wei-Da Guo, Wei-Ning Chine, Chien-Lin Wang, Guang-Hwa Shiue and
Ruey-Beei Wu........................................................................... National Taiwan University
Low-cost, Low-noise Vref Design for High-speed DDR Memory Modules
Yutaka Uematsu, Eiichi Suzuki and Hideki Osaka.............................................. Hitachi, Ltd
Yoji Nishio and Susumu Hatano........................................................... Elpida Memory, Inc
Effect of EBG Structures for Reducing Noise in Multi-Layer PCBs for Digital Systems
Daehyun Chung................................. Korea Advanced Institute of Science and Technology
Tae Hong Kim.................................................................... Georgia Institute of Technology
Chunghyun Ryu.................................. Korea Advanced Institute of Science and Technology
Ege Engin and Madhavan Swaminathan............................... Georgia Institute of Technology
Joungho Kim..................................... Korea Advanced Institute of Science and Technology
Common Mode Return Loss Consideration in Wirebond Packaging for High
Speed SerDes Links
Nanju Na, Marcel Arseneault, Katsuyuki Yonehara, Haitian Hu,
Deborah Zwitter and Edward M Wolf..................................................... IBM Corporation
Krishna Srinivasan.............................................................. Georgia Institute of Technology
Carrie Cox and Richard Anderson.......................................................... IBM Corporation
Study of Electrical Performance of Flip-Chip Package Via Designs for
Gigahertz Applications
Hao Shi, Wendemagegnehu T. Beyene, Sam Khalili and Chuck Yuan..................... Rambus
Performance Analysis of Edge-based DFE
Jihong Ren, Haechang Lee, Dan Oh, Brian Leibowitz, Vladimir Stojanovic,
Jared Zerbe and Nhat Nguyen................................................................................ Rambus
Experimental Evaluation of High-speed Data Transmission in a Waveguide-based Interconnect (Student Paper)
Asanee Suntives and Ramesh Abhari........................................................ McGill University
High-Speed Flex Chip-to-Chip Interconnect
Henning Braunisch, James E. Jaussi and Jason A. Mix............................... Intel Corporation
Full Characterization of Substrate Integrated Waveguides from S-Parameter Measurements
Reydezel Torres-Torres and Gerardo Romo......................... Intel Mexico Research Center
Bryce Horine........................................................................................... Intel Corporation
Adán Sánchez...................................................................... Intel Mexico Research Center
Howard Heck......................................................................................... Intel Corporation
Study of PCB Trace Crosstalk in Backplane Connector Pin Field
Ben Chia, Ravi Kollipara, Dan Oh and Chuck Yuan................................................ Rambus
7:00 - 8:00 am Continental Breakfast
8:00 – 10020 am Session XIII – Special Session SESSION CHAIRS:
George Katopsis, IBM
Alina Deutsch, IBM
A Framework and Simulator for Parallel Fast Integral Equation Simulation of
Microelectronic Structures
Vikram Jandhyala, Chuanyi Yang, Swagato Chakraborty, Indranil Chowdhury,
James Pingenot and Devan Williams ............................................ University of Washington
Large Scale Simulation of an Integrated Circuit Package
E. Gjonaj, M. Perotoni and T. Weiland......................... Technische Universitaet Darmstadt
Modeling Multilayered Packages Using the Parallel Finite Difference Time
Domain (PFDTD) Approach
R. Mittra, Neng-Tien Huang, Reza Hashemi and Wenhua Yu
............................................................................................ Pennsylvania State University
Daniel N. de Araujo, Bhyrav Mutnury and Moises Cases....................... IBM Corporation
Large Scale Signal and Interconnect FDTD Modeling for BGA Package
Xiaohe Chen, James L. Drewniak, Jianmin Zhang and Michael Cracraft.............................
............................................................................................ University of Missouri - Rolla
Bruce Archambeault and Samuel Connor................................................................... IBM
Parallelized Full Package Signal Integrity Analysis Using Spatially Distributed
3D Circuit Models
Byron Krauter........................................................................................................... IBM
Michael Beattie.............................................................................................. Sauerhof 80
David Widiger, Hao-Ming Huang, Jinwoo Choi and Yong Zhan................................. IBM
Multi-threaded Adaptive Multigrid Finite Element Method for Package Modeling
Yu Zhu, Jeffrey Mao, Marc E. Kowalski and An-Yu Kuo.................. Optimal Corporation
Wassaja Foyer
10:00 – 10:20 am Refreshment Break
Wassaja 1-2
10:20 – 11:20 am Session XIV – EM Modeling for TL
SESSION CHAIRS:
James. Drewniak, University of Missouri Rolla
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